1. Field of the Invention
The present invention relates to inductors and, more particularly, to a high Q inductor that is formed in a multi-level interconnect.
2. Description of the Related Art
Low-loss, linear inductors are common circuit elements in radio frequency (RF) applications, such as digital cellular telephones. These devices tend to be quite large with respect to the digital circuitry, and are one of the limiting factors in further significant reductions in the size of digital cellular telephones.
For example, one important measure of an inductor is the quality factor or Q of the inductor. High Q inductors are desirable in a number of RF circuits, such as resonant circuits. The Q of an inductor is given by equation (EQ.) 1 as:
Q=xcfx89L/R,xe2x80x83xe2x80x83EQ. 1 
where xcfx89 is related to the frequency f of the signal applied to the inductor (xcfx89=2(pi)(f)), L represents the inductance of the inductor, and R represents the resistance of the inductor.
As indicated by EQ. 1, the smaller the resistance, the higher the Q of the inductor. One common approach to reducing the resistance of an inductor is to increase the size of the inductor. As a result, high Q inductors are often implemented at the circuit board level as discrete components, requiring a significant amount of circuit board space.
Another approach to providing an integrated circuit with high Q inductors is to fabricate both the electrical circuit and the high Q inductors on the same semiconductor substrate. This approach, however, typically suffers from a number of drawbacks, including induced substrate currents and relatively thick metal layers.
A further approach to providing an integrated circuit with high Q inductors is to utilize micro-electromechanical systems (MEMS) technology. For example, using MEMS technology, the functionality of a low-loss inductor can be provided by using micron-sized electromechanical structures.
Although techniques exist for providing an integrated circuit with high Q inductors, there is a continuing need for alternate structures and methods of forming the structures.
The present invention provides an integrated circuit with high Q inductors. An inductor of the present invention has a longitudinal centerline and a conductor that spirals around the longitudinal centerline a plurality of times to form a plurality of loops. Each loop, in turn, has a first vertical segment that has a first via, a second vertical segment that has a second via, a first horizontal segment that is connected to the first via and the second via, and a second horizontal segment that is connected to the second vertical segment.
The present invention can also include a second inductor that has a second conductor that spirals around the longitudinal centerline a plurality of times to form a plurality of loops. A loop of the second conductor is formed between adjacent loops of the first inductor. Each loop of the second conductor has a third vertical segment that has a third via, a fourth vertical segment that has a fourth via, a third horizontal segment that is connected to the third via and the fourth via, and a fourth horizontal segment that is connected to the fourth vertical segment.
The present invention can also include a second inductor that has a second conductor that spirals around the longitudinal centerline a plurality of times to form a plurality of loops. A number of the loops of the second conductor are formed directly under the loops of the first inductor. Each loop of the second conductor has a third vertical segment having a third via, a fourth vertical segment having a fourth via, a third horizontal segment that is connected to the third via and the fourth via, and a fourth horizontal segment that is connected to the fourth vertical segment.
A better understanding of the features and advantages of the present invention will be obtained by reference to the following detailed description and accompanying drawings which set forth an illustrative embodiment in which the principals of the invention are utilized.